Alif Semiconductor /AE722F80F55D5LS_CM55_HE_View /CLKCTL_PER_SLV /SSI_CTRL

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Interpret as SSI_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)SS_IN_SEL 0SS_IN_VAL

SS_IN_SEL=Val_0x0

Description

SPI Control Register

Fields

SS_IN_SEL

SS_IN Mode Select One bit for each SPI module:

  • Bit 3: SPI3
  • Bit 0: SPI0 Note: If the corresponding SPI module is configured as a master, the associated bit in this field should be set to 0x1. If the corresponding SPI module is configured as a slave, and the master device is driving a slave select signal, the associated bit in this field should be set to 0x0. If the master device is not driving a slave select signal, the associated bit in this field should be set to 0x1, and the associated bit in SS_IN_VAL field should be set to 0x0.

0 (Val_0x0): SS_IN from I/O pin

1 (Val_0x1): SS_IN from SS_IN_VAL

SS_IN_VAL

SS_IN Value One bit for each SPI module:

  • Bit 11: SPI3
  • Bit 8: SPI0 When SS_IN_SEL = 0x1, the programmed SS_IN_VAL is fed to SPI module. Note: If the corresponding SPI module is configured as a master, the associated bit in this field should be set to 0x1.

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